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Display Engineer
Driver IC · Sitronix

ST7701S: datasheet, pinout & init code

ST7701S drives 480×480 square/round and 480×854 panels over parallel RGB, with a 3-wire SPI port used only for initialization.

DEDisplay Engineer Applications Team · Display application engineersEngineer-reviewed Oct 11, 2026
ManufacturerSitronix
TypeDisplay driver
InterfacesRGB (parallel) / SPI / MIPI DSI
Max resolution480×864

How ST7701S panels work

Unlike SPI drivers with GRAM, the ST7701S has no full-frame memory. The host must continuously stream pixels over the RGB bus, like a small video signal. Initialization happens separately over a 3-wire SPI port.

ESP32-S3 checklist

  1. Enable octal PSRAM and place the frame buffer in PSRAM.
  2. Send the panel's 3-wire SPI init table before starting the RGB peripheral.
  3. Set HSYNC/VSYNC porches from the panel datasheet.
  4. Use bounce buffers to avoid drift when Wi-Fi is active.

See ESP32-S3 display compatibility.

ST7701S library support

LibraryDriver / classNotes
LovyanGFX (Arduino / ESP-IDF)lgfx::Panel_ST7701 with lgfx::Bus_RGB
ESP-IDF esp_lcdespressif/esp_lcd_st7701
NoteInitialised over 3-wire SPI, then driven over parallel RGB.

Display modules using ST7701S

ST7701S troubleshooting & FAQ

Why does my ST7701S panel stay black on ESP32-S3?

Usually the 3-wire SPI init sequence was not sent (it runs on separate pins from the RGB bus), the panel-specific init table is wrong, or PSRAM is disabled. Start from the init table supplied with your exact panel.

What pixel clock should I use for 480×480 on ESP32-S3?

Typical values are 12–16 MHz with modest porches. Higher clocks can cause drift or flicker when PSRAM bandwidth is shared with Wi-Fi; enable bounce buffers in ESP-IDF to stabilize.

Not sure which display fits your design?

Send us your size, interface and host processor. A display engineer replies within 12 hours with 2–3 options, datasheets and init code. Samples from 1 pc.